#include "drv_l1_sfr.h"
#include "drv_l1_tft2.h"
#include "drv_l1_gpio.h"
#include "drv_l2_display.h"
#include "drv_l1_timer.h"
#include "drv_l1_uart.h"
#include "board_config.h"
#include "gplib_print_string.h"

#if LCD_DRV_EN_IDT_ILI9806E


static INT8U ILI9806E_HSD50_IPS_G25[][2] =
{
	// D/C , Data
	// Command set enable register
	{ 0x00, 0xFF },
	{ 0x01, 0xFF },
	{ 0x01, 0x98 },
	{ 0x01, 0x06 },
	{ 0x01, 0x04 },
	{ 0x01, 0x00 },

	// Change to Page 0
	{ 0x02, 10 },

	// Delay
	// display off
	{ 0x00, 0x28 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	// sleep in
	{ 0x00, 0x10 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	//---page1 command----
	{ 0x00, 0xFF },
	{ 0x01, 0xFF },
	{ 0x01, 0x98 },
	{ 0x01, 0x06 },
	{ 0x01, 0x04 },
	{ 0x01, 0x01 },

	// Change to Page 1
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x08 },
	{ 0x01, 0x10 },

	// output SDA
	{ 0x02, 10 },


	// Delay
#if 1
	{ 0x00, 0x20 },
	{ 0x01, 0x01 },
#else
	{ 0x00, 0x20 },
	{ 0x01, 0x00 },
#endif
	// DE = 1 Active
	{ 0x02, 10 },


	// Delay
	{ 0x00, 0x21 },
	{ 0x01, 0x01 },

	// DE = 1 Active
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x22 },
	{ 0x01, 0x22 },

	//RGB
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x30 },
	{ 0x01, 0x01 },

	// 480 X 854
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x31 },
	{ 0x01, 0x00 },

	// 2dot
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x40 },
	{ 0x01, 0x16 },

	// BT
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x41 },
	{ 0x01, 0x33 },

	// DVDDH DVDDL clamp
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x42 },
	{ 0x01, 0x03 },

	// VGH/VGL
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x43 },
	{ 0x01, 0x09 },

	// VGH_CLAMP 0FF ;
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x44 },
	{ 0x01, 0x07 },

	// VGL_CLAMP OFF ;
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x45 },
	{ 0x01, 0x16 },

	// VGL_REG  -11V
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x50 },
	{ 0x01, 0x78 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x51 },
	{ 0x01, 0x78 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x52 },
	{ 0x01, 0x00 },

	//Flicker
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x53 },
	{ 0x01, 0x48 },

	//Flicker
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x57 },
	{ 0x01, 0x50 },

	//Low voltage detect
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x60 },
	{ 0x01, 0x07 },

	// SDTI
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x61 },
	{ 0x01, 0x00 },

	// CRTI
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x62 },
	{ 0x01, 0x08 },

	// EQTI
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x63 },
	{ 0x01, 0x00 },

	// PCTI
	{ 0x02, 10 },

	// Delay
	//---Gamma Setting----
	{ 0x00, 0xA0 },
	{ 0x01, 0x00 },

	// Gamma 255
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA1 },
	{ 0x01, 0x09 },

	// Gamma 251
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA2 },
	{ 0x01, 0x10 },

	// Gamma 247
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA3 },
	{ 0x01, 0x0C },

	// Gamma 239
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA4 },
	{ 0x01, 0x06 },

	// Gamma 231
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA5 },
	{ 0x01, 0x09 },

	// Gamma 203
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA6 },
	{ 0x01, 0x06 },

	// Gamma 175
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA7 },
	{ 0x01, 0x03 },

	// Gamma 147
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA8 },
	{ 0x01, 0x09 },

	// Gamma 108
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xA9 },
	{ 0x01, 0x0C },

	// Gamma 80
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAA },
	{ 0x01, 0x12 },

	// Gamma 52
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAB },
	{ 0x01, 0x07 },

	// Gamma 24
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAC },
	{ 0x01, 0x0D },

	// Gamma 16
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAD },
	{ 0x01, 0x10 },

	// Gamma 8
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAE },
	{ 0x01, 0x0A },

	// Gamma 4
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xAF },
	{ 0x01, 0x00 },

	// Gamma 0
	{ 0x02, 10 },

	// Delay
	//---Nagitive Setting----
	{ 0x00, 0xC0 },
	{ 0x01, 0x00 },

	// Gamma 255
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC1 },
	{ 0x01, 0x09 },

	// Gamma 251
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC2 },
	{ 0x01, 0x10 },

	// Gamma 247
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC3 },
	{ 0x01, 0x0C },

	// Gamma 239
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC4 },
	{ 0x01, 0x05 },

	// Gamma 231
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC5 },
	{ 0x01, 0x0A },

	// Gamma 203
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC6 },
	{ 0x01, 0x07 },

	// Gamma 175
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC7 },
	{ 0x01, 0x04 },

	// Gamma 147
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC8 },
	{ 0x01, 0x09 },

	// Gamma 108
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xC9 },
	{ 0x01, 0x0D },

	// Gamma 80
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCA },
	{ 0x01, 0x12 },

	// Gamma 52
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCB },
	{ 0x01, 0x07 },

	// Gamma 24
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCC },
	{ 0x01, 0x0D },

	// Gamma 16
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCD },
	{ 0x01, 0x10 },

	// Gamma 8
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCE },
	{ 0x01, 0x0A },

	// Gamma 4
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xCF },
	{ 0x01, 0x00 },

	// Gamma 0
	{ 0x02, 10 },

	// Delay
	//-----PAGE6 Command-------
	{ 0x00, 0xFF },
	{ 0x01, 0xFF },
	{ 0x01, 0x98 },
	{ 0x01, 0x06 },
	{ 0x01, 0x04 },
	{ 0x01, 0x06 },

	// Change to Page 6
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x00 },
	{ 0x01, 0x21 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x01 },
	{ 0x01, 0x0A },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x02 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x03 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x04 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x05 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x06 },
	{ 0x01, 0x80 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x07 },
	{ 0x01, 0x06 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x08 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x09 },
	{ 0x01, 0x80 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0A },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0B },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0C },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0D },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0E },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x0F },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x10 },
	{ 0x01, 0xF0 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x11 },
	{ 0x01, 0xF4 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x12 },
	{ 0x01, 0x04 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x13 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x14 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x15 },
	{ 0x01, 0xC0 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x16 },
	{ 0x01, 0x08 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x17 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x18 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x19 },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x1A },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x1B },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x1C },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x1D },
	{ 0x01, 0x00 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x20 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x21 },
	{ 0x01, 0x23 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x22 },
	{ 0x01, 0x45 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x23 },
	{ 0x01, 0x67 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x24 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x25 },
	{ 0x01, 0x23 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x26 },
	{ 0x01, 0x45 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x27 },
	{ 0x01, 0x67 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x30 },
	{ 0x01, 0x01 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x31 },
	{ 0x01, 0x11 },

	//GOUT1
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x32 },
	{ 0x01, 0x00 },

	//GOUT2
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x33 },
	{ 0x01, 0xEE },

	//GOUT3
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x34 },
	{ 0x01, 0xFF },

	//GOUT4
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x35 },
	{ 0x01, 0xBB },

	//GOUT5
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x36 },
	{ 0x01, 0xCA },

	//GOUT6
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x37 },
	{ 0x01, 0xDD },

	//GOUT7
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x38 },
	{ 0x01, 0xAC },

	//GOUT8
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x39 },
	{ 0x01, 0x76 },

	//GOUT9
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3A },
	{ 0x01, 0x67 },

	//GOUT10
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3B },
	{ 0x01, 0x22 },

	//GOUT11
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3C },
	{ 0x01, 0x22 },

	//GOUT12
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3D },
	{ 0x01, 0x22 },

	//GOUT13
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3E },
	{ 0x01, 0x22 },

	//GOUT14
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x3F },
	{ 0x01, 0x22 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x40 },
	{ 0x01, 0x22 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x52 },
	{ 0x01, 0x10 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x53 },
	{ 0x01, 0x10 },

	//12:VGLO tie VGL_REG; 10: VGLO tie VGL
	{ 0x02, 10 },

	// Delay
	//------PAGE7 Command------------
	{ 0x00, 0xFF },
	{ 0x01, 0xFF },
	{ 0x01, 0x98 },
	{ 0x01, 0x06 },
	{ 0x01, 0x04 },
	{ 0x01, 0x07 },

	// Change to Page 7
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x17 },
	{ 0x01, 0x22 },

	// VGL_REG ON
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x02 },
	{ 0x01, 0x77 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x06 },
	{ 0x01, 0x13 },
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0xe1 },
	{ 0x01, 0x79 },
	{ 0x02, 10 },

	// Delay
	//--------------------------------------
	{ 0x00, 0xFF },
	{ 0x01, 0xFF },
	{ 0x01, 0x98 },
	{ 0x01, 0x06 },
	{ 0x01, 0x04 },
	{ 0x01, 0x00 },

	// Change to Page 0
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x36 },
	{ 0x01, 0x0A },
	{ 0x02, 120 },

	// Delay
	{ 0x00, 0x11 },
	{ 0x01, 0x00 },

	// Sleep-Out
	{ 0x02, 120 },

	// Delay
	{ 0x00, 0x29 },
	{ 0x01, 0x00 },

	// Display on
	{ 0x02, 10 },

	// Delay
	{ 0x00, 0x35 },
	{ 0x01, 0x00 },

	// TE ON
	{ 0x02, 10 }						// Delay
};

static void cmd_delay(INT32U i)
{
	drv_tiny_wait(i);
}

void serial_cmd_write(INT8U mode, INT8U cmd)
{
	INT32S	i;
	INT16U	temp;

	//---added by sam for initial GPIO ------
	gpio_write_io(PANEL_IO_CSN, 1);		//CS=1
	gpio_write_io(PANEL_IO_SCL, 0);		//SCL=0
	gpio_write_io(PANEL_IO_SDA, 0);		//SDA

	// set csn low
	gpio_write_io(PANEL_IO_CSN, 0);		//CS=0
	cmd_delay(2);
	if(mode == 0x1)						// for data
		temp = (0x100 | cmd);
	else
	if(mode == 0x0)						// for command
		temp = cmd;
	else	// for delay purpose
	{
		cmd_delay(cmd);
		return;;
	}

	for(i = 0; i < 9; i++)
	{
		// shift data
		gpio_write_io(PANEL_IO_SDA, ((temp & 0x100) >> 8)); /* SDA */
		temp = (temp << 1);

		//		cmd_delay(1);
		// toggle clock
		gpio_write_io(PANEL_IO_SCL, 1);						//SCL=1
		cmd_delay(2);
		gpio_write_io(PANEL_IO_SCL, 0);						//SCL=0
		cmd_delay(2);
	}

	// set csn high
	gpio_write_io(PANEL_IO_CSN, 1); //CS=1
	cmd_delay(1);
}

void serial_cmd_read(INT8U cmd, INT8U *read_data)
{
#if 0
	int i, temp;

	//	serial_cmd_write(0,cmd);
	//----cmd write ---------------------------------
	//---added by sam for initial GPIO ------
	gpio_init_io(PANEL_IO_CSN, GPIO_OUTPUT);
	gpio_init_io(PANEL_IO_SCL, GPIO_OUTPUT);
	gpio_init_io(PANEL_IO_SDA, GPIO_OUTPUT);

	//---added by sam for initial GPIO ------
	gpio_write_io(PANEL_IO_CSN, 1); //CS=1
	gpio_write_io(PANEL_IO_SCL, 0); //SCL=0
	gpio_write_io(PANEL_IO_SDA, 0); //SDA

	// set csn low
	gpio_write_io(PANEL_IO_CSN, 0); //CS=0
	cmd_delay(2);

	//	if(mode==0x1) // for data
	//		temp = (0x100|cmd);
	//	else if (mode==0x0) // for command
	temp = cmd;

	for(i = 0; i < 9; i++)
	{
		// shift data
		gpio_write_io(PANEL_IO_SDA, ((temp & 0x100) >> 8)); /* SDA */
		temp = (temp << 1);

		//		cmd_delay(1);
		// toggle clock
		gpio_write_io(PANEL_IO_SCL, 1);						//SCL=1
		cmd_delay(2);
		gpio_write_io(PANEL_IO_SCL, 0);						//SCL=0
		cmd_delay(2);
	}

	//gpio_write_io(PANEL_IO_CSN, 1);	//CS=1
	gpio_write_io(PANEL_IO_SCL, 0);		//SCL=0
	gpio_write_io(PANEL_IO_SDA, 0);		//SDA

	// set csn low
	gpio_write_io(PANEL_IO_CSN, 0);		//CS=0
	gpio_init_io(PANEL_IO_SDA, GPIO_INPUT);
	cmd_delay(2);

	for(i = 0; i < 8; i++)
	{
		gpio_write_io(PANEL_IO_SCL, 0); /* SCL0 */
		cmd_delay(2);
		gpio_write_io(PANEL_IO_SCL, 1); /* SCL1 */
		temp = gpio_read_io(PANEL_IO_SDA);
		*read_data <<= 1;
		*read_data |= temp;
		cmd_delay(2);
	}

	// set csn high
	gpio_write_io(PANEL_IO_CSN, 1);		//CS=1
	gpio_init_io(PANEL_IO_SDA, GPIO_OUTPUT);
	cmd_delay(2);
#endif
}

static INT32S ILI9806E_IDT_IDT_init(void)
{
	INT8U	temp;
	INT16U	i;

#if 1
	serial_cmd_read(0x82, &temp);
	DBG_PRINT("serial_cmd_read 0x82 =0x %X \r\n", temp);
	serial_cmd_read(0xDB, &temp);
	DBG_PRINT("serial_cmd_read = 0xDA %d \r\n", temp);

	for(i = 0; i < sizeof(ILI9806E_HSD50_IPS_G25) / 2; i++)
	{
		serial_cmd_write(ILI9806E_HSD50_IPS_G25[i][0], ILI9806E_HSD50_IPS_G25[i][1]);
	}

	return STATUS_OK;
#endif
}

static INT32S tft_ILI9806E_IDT_init(void)
{
	#ifdef PANEL_IO_RESET
	gpio_write_io(PANEL_IO_RESET, 1);
	cmd_delay(10);
	gpio_write_io(PANEL_IO_RESET, 0);
	cmd_delay(30);
	gpio_write_io(PANEL_IO_RESET, 1);
	cmd_delay(5000);
	#endif

	ILI9806E_IDT_IDT_init();

	R_TFT2_V_PERIOD = 900;
	R_TFT2_V_START = 20;
	R_TFT2_V_END = 874;

	R_TFT2_H_PERIOD = 528;
	R_TFT2_H_START = 5;
	R_TFT2_H_END = 484;

	drv_l1_tft2_rb_switch_set(TRUE);
	drv_l1_tft2_data_mode_set(TFT_DATA_MODE_565);
	drv_l1_tft2_dclk_sel_set(TFT_DCLK_SEL_180);
	drv_l1_tft2_vsync_unit_set(TRUE);
	drv_l1_tft2_signal_inv_set(TFT_VSYNC_INV | TFT_HSYNC_INV, (TFT_ENABLE & TFT_VSYNC_INV) | (TFT_ENABLE & TFT_HSYNC_INV));
	drv_l1_tft2_mode_set(TFT_MODE_PARALLEL);

	drv_l1_tft2_clk_set(TFT_CLK_DIVIDE_5);
	drv_l1_tft2_TFT_IO_enable(TRUE);
	drv_l1_tft2_en_set(TRUE);

	return STATUS_OK;
}

// tft table
DispCtrl_t TFT_Param_IDT_ILI9806E =
{
	/* lcd size */
	480,
	854,
	/* pip size */
	288,
	176,
	/* lcd init & uninit */
	tft_ILI9806E_IDT_init,
	NULL,
	/* lcd backlight control */
	LCD_BL_CTRL_CONSTANT,
	20 * 1000,	// in HZ for LCD_BL_CTRL_PWM
	55,			// in duty cycle for LCD_BL_CTRL_PWM
	/* tft format */
	DISP_FMT_GP420,
	/* lcd interface */
	LCD_IFCE_RGB,
	/* rotate before display */
	TFT_ROT_RIGHT,
	/* tft size */
	416,
	640
};

#endif
